verilog - what is this error "invalid module item" in verliog? -

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i have defined 2 modules, datapath , ctrl.

then define module in same file instantiates both datapath , ctrl

module mult(input reset, input [3:0] i0,i1, output o);      wire [3:0] cnt, sh;    wire load, go,ld1     datapath d0(i0,i1,cnt,sh,load,go,o);    ctrl c0(reset, clk,sh,cnt,ld1,load,go); endmodule

but verilog complains "invalid module item" on line "datapath d0...", why?

you missing semi-colon on previous line.


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